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Sony Developed Stacked CMOS Image Sensor Technology with 2-Layer Transistor Pixel

by Kamlesh Bhati
December 16, 2021
Sony Stacked CMOS Image Sensor Technology with 2-Layer Transistor Pixel
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Sony Developed Stacked CMOS Image Sensor Technology with 2-Layer Transistor Pixel

Today, Sony Semiconductor Solutions announced that it has successfully developed the world’s first 2-layer transistor pixel stacking CMOS image sensor technology, saturating the amount of signal about two times, so that the dynamic range is expanded and noise is reduced.

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While conventional CMOS image sensors have photodiodes and pixel transistors on the same substrate, Sony’s new technology separates the photodiodes and pixel transistors on separate substrate layers. This new structure increases the amount of saturated signal to approximately twice that of a conventional image sensor, increasing dynamic range and reducing noise, resulting in significantly improved imaging performance. The pixel structure with the new technology maintains or enhances the existing characteristics of the pixels at both current and smaller pixel sizes.

Sony Stacked CMOS image sensor architectures
Sony Stacked CMOS image sensor architectures

Stacked CMOS image sensors, a pixel chip consisting of back-illuminated pixels are stacked on top of a logic chip, and signal processing circuitry forms the logic chip. Within the pixel chip, photodiodes for converting light to electrical signals and pixel transistors for controlling signals are juxtaposed on the same substrate layer. With such structural limitations, how to maximize the number of saturation signals plays an important role in achieving high dynamic range and high image quality photography.

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The new structure developed by Sony is an advancement in stacked CMOS image sensor technology. Using proprietary stacking technology, Sony packages photodiodes and pixel transistors on separate substrates, stacking one on top of the other. In contrast, in conventional stacked CMOS image sensors, the photodiodes and pixel transistors are located side-by-side on the same substrate.

The new stacking technology supports an architecture that allows the photodiode and pixel transistor layers to be optimized independently, thereby approximately doubling the amount of saturation signal compared to conventional image sensors and thereby expanding the dynamic range.

In addition, because the pixel transistors outside the transmission gate (TRG), including the reset transistor (RST), select transistor (SEL) and amplification transistor (AMP), are in the layer without photodiode distribution, the size of the amplification transistor (AMP) can be increased. By increasing the size of the amplification transistor, Sony has succeeded in significantly reducing the problem of noise that images tend to produce at night and in other dim scenes.

Sony Develops World’s First Stacked CMOS Image Sensor Technology with 2-Layer Transistor Pixel

This new technology enables expanded dynamic range and reduced noise, and can avoid the problem of underexposure and overexposure in environments with a combination of the bright and dim lighting (such as backlit environments), and even in low-light (such as indoor, nighttime) environments can get high-quality, low-noise images.

Sony says it will contribute to the realization of increasingly high-quality imaging, such as smartphone photography, through this technology.

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