TSMC 3nm Plus Process Announced: Apple 17 SoC will First

TSMC 3nm Plus Process

TSMC 3nm Plus Process

As a semiconductor foundry giant, TSMC in recent years can be described as a boom, is regarded as the flagship SoC next year standard 5nm process increasingly mature, including Apple A14 and Kirin 9000 are built by the 5nm process.

TSMC in the new process is really like a beast, unstoppable, this year has been the mass production of 5nm process, and the next major node is 3nm, has long been announced will be put into mass production in 2022 scale. Today, TSMC announced that it will launch an enhanced version of the 3nm process in 2023, named “3nm Plus“, the first customer is Apple.

If Apple continues to use a generation of chips a year, then by 2023, using the 3nm Plus process, it will be “Apple A17.” TSMC did not reveal what changes 3nm Plus compared to 3nm, but apparently, there will be higher transistor density, lower power consumption, higher operating frequency. According to TSMC, the 3nm process can bring up to 70% increase in transistor density compared to 5nm, or up to 10-15% increase in performance, or up to 25-30% decrease in power consumption.

Besides, TSMC 2nm GAA process development progress ahead of schedule, has now ended the path exploration phase, but 3nm and 3nm Plus is still the traditional FinFET (finned field-effect transistor), Samsung is ahead of 3nm import GAA technology. GAA manufacturing and traditional FinFET has similarities, but the former has higher technical requirements and greater difficulty, the cost is correspondingly higher, although each for the GAA process fin shape is different, essentially the same.

Also, TSMC has recently made a major internal breakthrough in the 2nm process and is expected to conduct risky pilot production in the second half of 2023 and put it into volume production in 2024, while continuing to push into the 1nm process.

TSMC will continue the FinFET (fin-type field-effect transistor) on the 3nm process, while the 2nm will introduce the new MBCFET (multi-bridge channel field-effect transistor), which is a nanosheet, which can be seen as a leap from two-dimensional to three-dimensional and can greatly improve circuit control and reduce leakage rates.

From the advanced process, Samsung seems to want to achieve a bend in the 3nm beyond TSMC, and Samsung has also publicly stated that it wants to exceed TSMC by 2030, replacing the latter’s foundry status.

Via 1, Via 2

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