Samsung X-Cube 3D IC packaging technology for Creating Smaller Chips

Samsung X-Cube 3D IC packaging technology

Samsung X-Cube 3D IC packaging technology

Samsung started using its new 5-nanometer EUV technology to make chips a few months ago, but that doesn’t mean the company isn’t improving on its old technology. Earlier today, the South Korean tech giant said that its new X-Cube 3D IC chip packaging technology, which offers both faster speeds and better energy efficiency, is now available.

Samsung X-Cube 3D IC packaging technology Introduction Video

Samsung’s contract chip manufacturing arm, Samsung Wafer Works, has completed the production of test chips using the X-Cube technology, and the new 3D IC chip packaging technology is now available for the manufacture of 7nm and 5nm chips.

Samsung X-Cube 3D IC packaging technology allows for the ultra-thin stacking of multiple chips to create more compact logic semiconductors. The process uses through-silicon via (TSV) technology to make vertical electrical connections instead of using wires.

Samsung X-Cube 3D IC packaging technology

Samsung claims that chip designers can use its X-Cube technology to design a custom chip that best fits their unique needs. Thanks to TSV technology, the signal path between different stacks in the chip is significantly reduced, improving data transfer speed and energy efficiency. Various logic blocks, memories, and memory chips can be stacked on top of each other to create a more compact silicon package.

The technology will be used in 5G, AI, AR, HPC (high-performance computing), mobile, and VR, Samsung said. Samsung Foundry will showcase its new technology during the Hot Chips 2020 expo, which will be held from August 18 to August 20. Samsung is also working on improving the 5nm process, skipping 4nm, and developing 3nm technology shortly.

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